Quick path
Open the CAN Bit Timing Calculator, enter the CAN peripheral clock, target bitrate, prescaler, propagation segment, phase segment 1, phase segment 2, and SJW. Start by matching actual bitrate, then tune the sample point.
Core formula
One bit is made from one sync segment plus the programmable timing segments. The total time quanta per bit is
1 + PropSeg + PhaseSeg1 + PhaseSeg2. Actual bitrate is
clock / (prescaler * total tq).
Sample point
The sample point is the percentage of the bit time that has elapsed before the receiver samples the bus. A later point can help absorb propagation delay on longer buses, while an earlier point leaves more room for phase correction.
SJW and resynchronization
Sync jump width controls how far the controller may adjust timing when it sees an edge. Keep SJW within the controller limit and no larger than phase segment 2 unless the reference manual gives a different rule.
Register mapping
Many MCU manuals use names such as TSEG1 and TSEG2 rather than separate propagation and phase segment fields. Some registers store the value minus one. Do the timing math first, then translate to the exact register encoding for the target controller.
Production checks
- Verify oscillator tolerance and transceiver delay against the selected bitrate.
- Check bus length, topology, stub length, and termination before changing firmware timing.
- Use a CAN analyzer or oscilloscope when repeated error frames appear after configuration changes.